In recent years, along with the increase in integration and performance of LSIs, micro-fabrication (scaling) of MISFETs has been developed. In particular, since the thickness of the gate insulating film has been getting thinner, the leakage current has been increasing, which poses a problem of increase in power consumption. Nevertheless, for CMISFETs for use in mobile devices, low power consumption and high-speed operation are required. That is, it is required to speed up the operation of a CMISFET with its leakage current being suppressed below a predetermined level.
Japanese Patent Application Laid-Open Publication N 2004-134753 (Patent Document 1) discloses a technology of forming a gate insulating layer having various dielectric constants and various equivalent oxide thicknesses on a semiconductor substrate.
Japanese Patent Application Laid-Open Publication No. 2002-280461 (Patent Document 2) discloses a technology of doping impurity metal ions into a film with high dielectric constant in order to independently control threshold voltages of respective MISFETs.
Japanese Patent Application Laid-Open Publication No. 2002-314074 (Patent Document 3) discloses a technology of forming a high dielectric film by means of atom implantation into the film such as ion implantation and heat treatment.
Also, technologies regarding flat band voltage of a MISFET are disclosed in the following Non-Patent Documents:
W. Tsai, L. Ragnarsson, P. J. Chen, B. Onsia, R. J. Carter, E. Cartier, E. Young, M. Green, M. Caymax, S. De Gendt and M. Heyns, “Technical Digest of VLSI symposium”, 2002, p. 21 (Non-Patent Document 1);
S. Kubicek, J. Chen, L. -A. Ragnarsson, R. J. Carter, V. Kaushik, G. S. Lujan, E. Cartier, W. K. Henson, A. Kerber, L. Pantisano, S. Beckx, P. Jaenen, W. Boullart, M. Caymax, S. De Gendt, M. Heyns and K. De Meyer, “ESS-DERC”, 2003, p. 251 (Non-Patent Document 2); and
C. Hobbs, L. Fonseca, V. Dhandapani, S. Samavedam, B. Taylor, J. Grant, L. Dip, D. Triyoso, R. Hedge, D. Gilmer, R. Garcia, D. Roan, L. Lovejoy, R. Rai, L. Hebert, H. Tseng, B. White and P. Tobin, “Symp. of VLSI technology”, 2003, p. 9 (Non-Patent document 3).